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ASIC Design Engineer - Mix Signal Project
Position > Shanghai,China Branch

Base: Shanghai, Full time

Hiring Number: 1

Responsibilities:
• MS simulation environment build.
• Digital design works including RTL coding, simulation, synthesis, timing analysis and lab debugging.

Qualifications:
• MSEE or MS in computer science plus 2 years of industry experience.
• Proficiency in Verilog.
• C. Knowledge of Microcontroller is a must.

Send Resume to : recruit@giantec-semi.com

     
Contact Information
Giantec Semiconductor Inc
Add. : No.12, Lane 647, Songtao Rd , Zhangjiang
Hi-Tech Park , Pudong New Area , Shanghai , China
TEL:86-21-50802030 FAX:86-21-50802032
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Last Updated: 10/2013
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