Key Areas of Responsibility:
• Work with analog/digital design team for new product development
• Logic design by using EDA tools such as Cadence and Synopsys
• Architecture design and digital circuit implementation
• Generate design verification plan and execute verification test

Required knowledge, skills, abilities:
• Good Knowledge in Verilog HDL and EDA tools (Cadence/Synopsys): HDL simulator, synthesis and STA tools (NC-Verilog, DC, PT, etc.)
• At least 5 year R&D experience
• Familiar with 8051 and FPGA design
• Basic knowledge of backend

Required education and experience:
• Bachelor degree or above in Electronics Engineering

Language requirements:
• Good communication skills, English language with CET 4

Additional knowledge, skills, abilities, certifications:
• MCU design experience is a plus
• Smart Card design experience is a plus
• Team leader is prefer
Send Resume to : recruit@giantec-semi.com